FPGA-based Speeded Up Robust Features

Šváb, J., Krajník, T., Faigl, J., Přeučil, L.

ŠVÁB, J., et al. FPGA-based Speeded Up Robust Features. In: 2009 IEEE International Conference on Technologies for Practical Robot Applications. The 2nd Annual IEEE International Conference on Technologies for Practical Robot Applications, Woburn, 2009-11-09/2009-11-10. Boston: IEEE, 2009. pp. 35-41. ISBN 978-1-4244-4991-0. DOI 10.1109/TEPRA.2009.5339646.