Logical Simulation

Semestr: Winter

Range: 2P+2S

Completion:

Credits: 4

Programme type:

Study form:

Course language:

Summary:

General introduction to simulation: fundamental ideas and principles of simulation systems, synchronous and asynchronous simulation. Simulation system VHDL and its use for simulation of digital circuits: data types, entities, architectures, sequential environment (processes, functions, procedures), signals and their attributes, resolution function, parallel environment (data-flow description, blocks, structural description), configuration of structural models. Students who completed course 36SIM cannot enroll.

Keywords:

Course syllabus:

Seminar syllabus:

Literature:

1. Cohen Ben: VHDL Coding Styles and Methodologies, Springer 1999
2. Zwolinski Mark: Digital System Design with VHDL, Prentice Hall 2003

Examiners:

Lecturers:

Instructors: