Semestr: Summer

Range: 3+2s


Credits: 6

Programme type: Undefined

Study form:

Course language:


Simulation of discrete systems: models of computer networks performance and functional and structural models of digital circuits. Simula-like quasi-parallel environment (implemented in C++ programming language) and VHDL system are used for student assignments.


Digital circuit simulation, event, process, types of delays, VHDL, signals, variables, delta delay, resolution function, parallel environment, sequential environment, component, configuration, queueing system, pseudo-parallel environment, event list, proc

Course syllabus:

1. Introduction to modeling systems
2. Queuing systems: analytical and simulation models
3. Survey of inner principles of discrete simulation systems
4. Characteristics of Simula 67 language, detailed description of class Simulation
5. Implementation of quasi-parallel environment in C++ programming language
6. Performance simulation of computer networks, simple support in C++
7. Description levels of digital circuits, simulation strategies
8. Simple support for simulation of digital circuits in C++
9. Introduction to VHDL: entities, architectures, variables and signals
10. VHDL: processes, sensitive lists, data-flow description
11. VHDL: parallel environment, structural description, components
12. VHDL: structural model of simple processor
13. VHDL: blocks, simulation of buses, generation of regular structures
14. Generating, transforming and testing of random numbers

Seminar syllabus:

1. Basic notions, queuing systems
2. Poisson process, analytical models of particular queuing systems
3. Event oriented simulation models of queuing systems
4. Process oriented simulation models of queuing systems
5. Simulation of priorities and failures in queuing systems
6. Description of complex structures of queuing systems
7. Performance simulation of the Ethernet computer network in C++
8. Simulation of digital circuits in C++
9. VHDL: sequential statements, transport and inertial delay
10. VHDL: functional models of some medium scale integrated circuits
11. VHDL: simulation of the edge sensitive digital circuits
12. VHDL: components, design of the structural models of digital circuits
13. VHDL: implementation of the model of cache memory
14. Check of the semester homework, assessment


[1] Birtwistle, G. M.: Discrete Modelling on Simula. Macmillan Pub., London 1985
[2] Lipsett, R., Sheffer, C. F., Ussery, C.: VHDL: Hardware Description and Design Kluwer Academic Publishers. London 1989