Multiplier Execution Latency Reduction Using Variable Latency Pipeline

Marek, T., Pluháček, A.

MAREK, T. and A. PLUHÁČEK. Multiplier Execution Latency Reduction Using Variable Latency Pipeline. In: GROSSPIETSCH, E. and K. KLÖCKER, eds. Proceedings of the Work in Progress Session. EUROMICRO Conference on Digital System Design, Porto, 2005-08-30/2005-09-03. Linz: Johannes Kepler University, 2005. p. 13-14. ISBN 3-902457-09-0.