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ElShafey, K., Hlavička, J. 2002 Estimating the Amount of Spare CLBs for Reconfiguring FPGA, detail

ElShafey, K., Hlavička, J. 2002 On-Line Detection and Location of Faulty CLBs in FPGA-Based Systems, detail

ElShafey, K. 2002 Design of Reconfigaration Control Unit (RCU) of Using Jbits, detail

ElShafey, K. 2002 Fault-Tolerant FPGA-Based Systems, detail

Bečvář, M., Daněk, M., ElShafey, K., Hlavička, J., Schmidt, J. 2001 Architecture Acceleration using FPGAs, detail

ElShafey, K., Schmidt, J., Hlavička, J. 2001 Design and Analysis of a Suitable Serial Approach to CORDIC Magnitude Processor in an FPGA, detail

ElShafey, K., Hlavička, J., Schmidt, J. 2001 A Comparison of Serial and Parallel Approaches to FPGA Implementations of Arithmetic Functions, detail

ElShafey, K., Hlavička, J. 2001 An On-Line Self-Checking Approach for Testing FPGA Logic Blocks, detail

ElShafey, K., Hlavička, J. 2001 An Approach for Testing FPGA Logic Blocks, detail